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Product Description
| General Information | |||||||||
| Type | CPU / Microprocessor | ||||||||
| Market Segment | Mobile | ||||||||
| Family | Intel Core 2 Duo Mobile | ||||||||
| Model Number | T9550 | ||||||||
| CPU Part Number |
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| Frequency | 2667 MHz | ||||||||
| Bus Speed |
1066 MHz | ||||||||
| Clock Multiplier |
10 | ||||||||
| Package | 478-pin micro-FCPGA 1.38" x 1.38" (3.5 cm x 3.5 cm) |
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| Socket | Socket P | ||||||||
| Introduction Date | Dec 28, 2008 | ||||||||
| End-of-Life Date | Last order date is April 29, 2011 Last shipment date for OEM processors is October 14, 2011 |
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| Price at Introduction | $316 | ||||||||
| S-Spec Numbers | |||||||||
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| Architecture / Microarchitecture | |||||||||
| Microarchitecture | Core | ||||||||
| Platform | Montevina MontevinaPlus |
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| Processor Core |
Penryn | ||||||||
| Core Stepping | E0 (SLGE4) | ||||||||
| CPUID | 1067A (SLGE4) | ||||||||
| Manufacturing Process | 0.045 micron | ||||||||
| Data Width | 64 bit | ||||||||
| Number of CPU Cores | 2 | ||||||||
| Number of Threads | 2 | ||||||||
| Floating Point Unit | Integrated | ||||||||
| Level 1 Cache Size |
2 x 32 KB 8-way set associative instruction caches 2 x 32 KB 8-way set associative write-back data caches |
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| Level 2 Cache Size ? | Shared 6 MB 24-way set associative cache | ||||||||
